156 search results - page 31 / 32 » Advances in Quantum Computing Fault Tolerance and Testing |
DAC
2010
ACM
13 years 11 months ago
2010
ACM
Effective system verification requires good specifications. The lack of sufficient specifications can lead to misses of critical bugs, design re-spins, and time-to-market slips. I...
ICFEM
2009
Springer
13 years 5 months ago
2009
Springer
In this paper we continue the study of a strict extension of the Computation Tree Logic, called graded-CTL, recently introduced by the same authors. This new logic augments the sta...
DAC
2009
ACM
14 years 8 months ago
2009
ACM
Post-silicon processor debugging is frequently carried out in a loop consisting of several iterations of the following two key steps: (i) processor execution for some duration, fo...
DAC
2001
ACM
14 years 8 months ago
2001
ACM
This paper presents the design and evaluation of an 8-bit adiabatic multiplier. Both the multiplier core and its built-in self-test logic have been designed using a true single-ph...
LCTRTS
2009
Springer
14 years 2 months ago
2009
Springer
Register file (RF) is extremely vulnerable to soft errors, and traditional redundancy based schemes to protect the RF are prohibitive not only because RF is often in the timing c...