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FPGA
2010
ACM
232views FPGA» more  FPGA 2010»
15 years 3 months ago
High-throughput bayesian computing machine with reconfigurable hardware
We use reconfigurable hardware to construct a high throughput Bayesian computing machine (BCM) capable of evaluating probabilistic networks with arbitrary DAG (directed acyclic gr...
Mingjie Lin, Ilia Lebedev, John Wawrzynek
148
Voted
CODES
2007
IEEE
15 years 9 months ago
Reliable multiprocessor system-on-chip synthesis
This article presents a multiprocessor system-on-chip synthesis (MPSoC) algorithm that optimizes system mean time to failure. Given a set of directed acyclic periodic graphs of co...
Changyun Zhu, Zhenyu (Peter) Gu, Robert P. Dick, L...
VISUALIZATION
2005
IEEE
15 years 8 months ago
Exploiting Frame-to-Frame Coherence for Accelerating High-Quality Volume Raycasting on Graphics Hardware
GPU-based raycasting offers an interesting alternative to conventional slice-based volume rendering due to the inherent flexibility and the high quality of the generated images. ...
Thomas Klein, Magnus Strengert, Simon Stegmaier, T...
164
Voted
COMGEO
2004
ACM
15 years 2 months ago
A local search approximation algorithm for k-means clustering
In k-means clustering we are given a set of n data points in d-dimensional space d and an integer k, and the problem is to determine a set of k points in d , called centers, to mi...
Tapas Kanungo, David M. Mount, Nathan S. Netanyahu...
147
Voted
CLOUD
2010
ACM
15 years 7 months ago
Nephele/PACTs: a programming model and execution framework for web-scale analytical processing
We present a parallel data processor centered around a programming model of so called Parallelization Contracts (PACTs) and the scalable parallel execution engine Nephele [18]. Th...
Dominic Battré, Stephan Ewen, Fabian Hueske...