The advent of strong multi-level partitioners has made topdown min-cut placers a favored choice for modern placer implementations. We examine terminal propagation, an important st...
Increasing source voltage (Source-Biasing) is an efficient technique for reducing gate and sub-threshold leakage of SRAM arrays. However, due to process variation, a higher source...
Swaroop Ghosh, Saibal Mukhopadhyay, Kee-Jong Kim, ...
Design and verification of systems at the Register-Transfer (RT) or behavioral level require the ability to reason at higher levels of abstraction. Difference logic consists of an...
In floorplan design, it is common that a designer will want to control the positions of some modules in the final packing for various purposes like data path alignment, I/O connec...
We propose a framework for integrating data from multiple relational sources into an XML document that both conforms to a given DTD and satisfies predefined XML constraints. The f...
Michael Benedikt, Chee Yong Chan, Wenfei Fan, Juli...