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EH
1999
IEEE
179views Hardware» more  EH 1999»
14 years 8 days ago
Artificial Evolution of Active Filters: A Case Study
This article focuses on the application of artificial evolution to the synthesis of analog active filters. The main objective of this research is the achievement of a new class of...
Ricardo Salem Zebulum, Marco Aurélio Cavalc...
DAC
2003
ACM
14 years 9 months ago
Death, taxes and failing chips
In the way they cope with variability, present-day methodologies are onerous, pessimistic and risky, all at the same time! Dealing with variability is an increasingly important as...
Chandu Visweswariah
ISPD
2003
ACM
132views Hardware» more  ISPD 2003»
14 years 1 months ago
Architecture and synthesis for multi-cycle communication
For multi-gigahertz designs in nanometer technologies, data transfers on global interconnects take multiple clock cycles. In this paper, we propose a regular distributed register ...
Jason Cong, Yiping Fan, Xun Yang, Zhiru Zhang
FPL
2008
Springer
254views Hardware» more  FPL 2008»
13 years 9 months ago
Digital hilbert transformers for FPGA-based phase-locked loops
The phase detector is a main building block in phaselocked loop (PLL) applications. FPGAs permit the realtime implementation of the CORDIC algorithm which offers an efficient solu...
Martin Kumm, M. Shahab Sanjari
RSP
2003
IEEE
149views Control Systems» more  RSP 2003»
14 years 1 months ago
Rapid Scheduling of Efficient VLSI Architectures for Next-Generation HSDPA
In this paper, an efficient design flow integrating Mentor Graphics Precesion C and HDL designer is derived. In this hybrid prototyping environment, efficient FPGA architectures a...
Yuanbin Guo, Gang Xu, Dennis McCain, Joseph R. Cav...