3456 search results - page 110 / 692 » Algorithms for Interface Synthesis |
ISCAS
2007
IEEE
14 years 4 months ago
2007
IEEE
—A shared bus is a suitable structure for minimizing the interconnections costs in system synthesis. It has also been shown that the word-length of Functional Units has a great i...
FPL
2005
Springer
14 years 3 months ago
2005
Springer
Modern heterogeneous FPGAs contain “hard” specificpurpose structures such as blocks of memory and multipliers in addition to the completely flexible “soft” programmable ...
SIGGRAPH
2003
ACM
14 years 3 months ago
2003
ACM
While texture synthesis on surfaces has received much attention in computer graphics, the ideal solution that quickly produces high-quality textures with little user intervention ...
ICCAD
2007
IEEE
2007
IEEE
Finding linear building-blocks for RTL synthesis of polynomial datapaths with fixed-size bit-vectors
14 years 2 months ago
Abstract: Polynomial computations over fixed-size bitvectors are found in many practical datapath designs. For efficient RTL synthesis, it is important to identify good decompositi...
ASPDAC
2008
ACM
14 years 9 days ago
2008
ACM
In this paper, we study the buffered clock tree synthesis problem under thermal variations for 3D IC technology. Our major contribution is the Balanced Skew Theorem, which provides...