3456 search results - page 152 / 692 » Algorithms for Interface Synthesis |
ISCAS
2005
IEEE
14 years 4 months ago
2005
IEEE
— Multicycling is a widely investigated technique for performance optimisation in behavioural synthesis. It allows an operation to execute over two or more control steps with the...
DATE
2003
IEEE
14 years 4 months ago
2003
IEEE
We present two novel strategies to increase the scope for application of speculative code motions: (1) Adding scheduling steps dynamically during scheduling to conditional branche...
FCCM
2000
IEEE
14 years 3 months ago
2000
IEEE
Mapping computations written in high-level programming languages to FPGA-based computing engines requires programmers to generate the datapath responsible for the core of the comp...
ISSS
2000
IEEE
14 years 3 months ago
2000
IEEE
This paper addresses the problem of estimating lower bounds on the power consumption in scheduled data flow graphs with a fixed number of allocated resources prior to binding. T...
ICCAD
1997
IEEE
14 years 2 months ago
1997
IEEE
Memory-intensive behaviors often contain large arrays that are synthesized into off-chip memories. With the increasing gap between on-chip and off-chip memory access delays, it is...