736 search results - page 48 / 148 » Algorithms for Ordinal Arithmetic |
DCC
2004
IEEE
14 years 7 months ago
2004
IEEE
A d-feedback-with-carry shift register (d-FCSR) is a finite state machine, similar to a linear feedback shift register, in which a small amount of memory and a delay (by d-clock c...
GLVLSI
2003
IEEE
14 years 27 days ago
2003
IEEE
Clock-delayed (CD) domino is a dynamic logic family developed to provide both inverting and non-inverting logic on single-rail gates. It is self-timed and can be easily pipelined ...
ISCAS
2002
IEEE
14 years 16 days ago
2002
IEEE
—JPEG2000 is an upcoming compression standard for still images that has a feature set well tuned for diverse data dissemination. These features are possible due to adaptation of ...
ASIACRYPT
1999
Springer
13 years 12 months ago
1999
Springer
Abstract. The problem of proving a number is of a given arithmetic format with some prime elements, is raised in RSA undeniable signature, group signature and many other cryptograp...
DAGSTUHL
2006
13 years 9 months ago
2006
We consider the problem of sparse interpolation of a multivariate black-box polynomial in floating-point arithmetic. That is, both the inputs and outputs of the black-box polynomia...