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ICCAD
2001
IEEE
201views Hardware» more  ICCAD 2001»
14 years 4 months ago
An Integrated Data Path Optimization for Low Power Based on Network Flow Method
Abstract: We propose an effective algorithm for power optimization in behavioral synthesis. In previous work, it has been shown that several hardware allocation/binding problems fo...
Chun-Gi Lyuh, Taewhan Kim, Chien-Liang Liu
ISCAS
2007
IEEE
144views Hardware» more  ISCAS 2007»
14 years 1 months ago
Multiple-Width Bus Partitioning Approach to Datapath Synthesis
—A shared bus is a suitable structure for minimizing the interconnections costs in system synthesis. It has also been shown that the word-length of Functional Units has a great i...
Arash Ahmadi, Mark Zwolinski
JNW
2006
88views more  JNW 2006»
13 years 7 months ago
A Genetic Algorithms Based Approach for Group Multicast Routing
Whereas multicast transmission in one-to-many communications allows the operator to drastically save network resources, it also makes the routing of the traffic flows more complex ...
Luca Sanna Randaccio, Luigi Atzori
CODES
2004
IEEE
13 years 11 months ago
Automatic synthesis of system on chip multiprocessor architectures for process networks
In this paper, we present an approach for automatic synthesis of System on Chip (SoC) multiprocessor architectures for applications expressed as process networks. Our approach is ...
Basant Kumar Dwivedi, Anshul Kumar, M. Balakrishna...
DAC
2000
ACM
14 years 8 months ago
Unifying behavioral synthesis and physical design
eously demand shorter and less costly design cycles. Designing at higher levels of abstraction makes both objectives achievable, but enabling techniques like behavioral synthesis h...
William E. Dougherty, Donald E. Thomas