166 search results - page 23 / 34 » An Adaptive Issue Queue for Reduced Power at High Performanc... |
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
This paper presents a new scheduling technique to improve the speed, power, and scalability of a dynamic scheduler. In a high-performance superscalar processor, the instruction sc...
IPPS
2010
IEEE
13 years 5 months ago
2010
IEEE
Abstract-- Recent studies have shown that cache partitioning is an efficient technique to improve throughput, fairness and Quality of Service (QoS) in CMP processors. The cache par...
CODES
2007
IEEE
14 years 1 months ago
2007
IEEE
3D stacked wafer integration has the potential to improve multiprocessor system-on-chip (MPSoC) integration density, performance, and power efficiency. However, the power density...
JSAC
2011
13 years 2 months ago
2011
This paper investigates the issue of dynamic resource allocation (DRA) in the context of multiuser cognitive radio networks. We present a general framework adopting generalized si...
FAST
2011
12 years 11 months ago
2011
Although Flash Memory based Solid State Drive (SSD) exhibits high performance and low power consumption, a critical concern is its limited lifespan along with the associated relia...