166 search results - page 8 / 34 » An Adaptive Issue Queue for Reduced Power at High Performanc... |
ISCA
2007
IEEE
14 years 1 months ago
2007
IEEE
Conventional load/store queues (LSQs) are an impediment to both power-efficient execution in superscalar processors and scaling to large-window designs. In this paper, we propose...
ISCAS
2007
IEEE
14 years 1 months ago
2007
IEEE
Abstract— This paper reports the design of a high performance, adaptive low/high swing CMOS driver circuit (mj–driver) suitable for driving of global interconnects with large c...
ICC
2009
IEEE
14 years 2 months ago
2009
IEEE
—This paper presents a novel cross-layer design for joint power and end-to-end rate control optimization in DSCDMA wireless networks, along with a detailed implementation and eva...
CODES
2006
IEEE
14 years 1 months ago
2006
IEEE
In deep sub-micron technology, the crosstalk effect between adjacent wires has become an important issue, especially between long on-chip buses. This effect leads to the increas...
ASPDAC
2009
ACM
14 years 2 months ago
2009
ACM
— To address the performance limitation brought by the scaling issues of on-chip global wires, a new configuration for global wiring using on-chip lossy transmission lines is pr...