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» An Algorithm for Locating Logic Design Errors
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DAC
2008
ACM
14 years 9 months ago
On the role of timing masking in reliable logic circuit design
Soft errors, once only of concern in memories, are beginning to affect logic as well. Determining the soft error rate (SER) of a combinational circuit involves three main masking ...
Smita Krishnaswamy, Igor L. Markov, John P. Hayes
DSD
2006
IEEE
113views Hardware» more  DSD 2006»
13 years 10 months ago
Cascade Scheme for Concurrent Errors Detection
The paper deals with synthesis technique for designing circuits with cascade errors detection. The proposed technique is based on partitioning a scheme into a number of cascades f...
Ilya Levin, Vladimir Ostrovsky, Osnat Keren, Vladi...
POPL
2005
ACM
14 years 8 months ago
Region-based shape analysis with tracked locations
This paper proposes a novel approach to shape analysis: using local reasoning about individual heap locations of global reasoning about entire heap abstractions. We present an int...
Brian Hackett, Radu Rugina
IJSYSC
2006
127views more  IJSYSC 2006»
13 years 8 months ago
Backlash compensation of nonlinear systems using fuzzy logic
: A backlash compensator is designed for nonlinear systems using the fuzzy logic. The classification property of fuzzy logic systems makes them a natural candidate for the rejectio...
Jun Oh Jang, Gi Joon Jeon
POPL
2003
ACM
14 years 8 months ago
From symptom to cause: localizing errors in counterexample traces
There is significant room for improving users' experiences with model checking tools. An error trace produced by a model checker can be lengthy and is indicative of a symptom...
Thomas Ball, Mayur Naik, Sriram K. Rajamani