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» An Analog Integrated Circuit Design Laboratory
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SBCCI
2005
ACM
80views VLSI» more  SBCCI 2005»
14 years 1 months ago
On the design of very small transconductance OTAs with reduced input offset
In this paper it will be demonstrated, from the theory and measurements, that series-parallel (SP) mirrors allow building current copiers with copy factors of thousands, without d...
Alfredo Arnaud, Rafaella Fiorelli, Carlos Galup-Mo...
DAC
2006
ACM
14 years 1 months ago
Design in reliability for communication designs
Silicon design implementation has become increasingly complex with the deep submicron technologies such as 90nm and below. It is common to see multiple processor cores, several ty...
Uday Reddy Bandi, Murty Dasaka, Pavan K. Kumar
DAC
2009
ACM
14 years 2 months ago
Yield-driven iterative robust circuit optimization algorithm
This paper proposes an equation-based multi-scenario iterative robust optimization methodology for analog/mixed-signal circuits. We show that due to local circuit performance mono...
Yan Li, Vladimir Stojanovic
ISLPED
2003
ACM
94views Hardware» more  ISLPED 2003»
14 years 27 days ago
A 0.75-mW analog processor IC for wireless biosignal monitor
This work presents a single-channel analog processor IC for the wireless biosignal monitor. This chip occupies a small die area of 0.52 mm2 and has a low power consumption of 0.75...
Chih-Jen Yen, Mely Chen Chi, Wen-Yaw Chung, Shing-...
IJCV
1998
81views more  IJCV 1998»
13 years 7 months ago
Estimating the Focus of Expansion in Analog VLSI
In the course of designing an integrated system for locating the focus of expansion (FOE) from a sequence of images taken while a camera is translating, a variety of direct motion ...
Ignacio S. McQuirk, Berthold K. P. Horn, Hae-Seung...