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» An Analog Leaf Cell for Analog Circuit Design
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VLSI
2010
Springer
13 years 2 months ago
Local Biasing and the Use of Nullator-Norator Pairs in Analog Circuits Designs
Although local biasing of components used in an analog circuit is shown to be a very attractive design methodology, significantly simplifying the design procedure [3], it makes the...
Reza Hashemian
ISQED
2000
IEEE
136views Hardware» more  ISQED 2000»
13 years 11 months ago
A Layout Approach for Electrical and Physical Design Integration of High-Performance Analog Circuits
This paper presents a layout generation tool that aims to reduce the gap between electrical sizing and physical realization of high performance analog circuits. The procedural lay...
Mohamed Dessouky, Marie-Minerve Louërat
ICCAD
2004
IEEE
80views Hardware» more  ICCAD 2004»
14 years 4 months ago
Techniques for improving the accuracy of geometric-programming based analog circuit design optimization
We present techniques for improving the accuracy of geometric-programming (GP) based analog circuit design optimization. We describe major sources of discrepancies between the res...
Jintae Kim, Jaeseo Lee, Lieven Vandenberghe
SBCCI
2006
ACM
126views VLSI» more  SBCCI 2006»
14 years 1 months ago
Power constrained design optimization of analog circuits based on physical gm/ID characteristics
This paper presents a transistor optimization methodology for low-power analog integrated CMOS circuits, relying on the physics-based gm/ID characteristics as a design optimizatio...
Alessandro Girardi, Sergio Bampi
DATE
2002
IEEE
98views Hardware» more  DATE 2002»
14 years 7 days ago
A Test Design Method for Floating Gate Defects (FGD) in Analog Integrated Circuits
A unified approach to fault simulation for FGDs is introduced. Instead of a direct fault simulation, the proposed approach calculates indirectly from the simulator output the set...
Michael Pronath, Helmut E. Graeb, Kurt Antreich