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» An Analysis of Delay Based PUF Implementations on FPGA
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DAC
2003
ACM
14 years 8 months ago
Optimal integer delay budgeting on directed acyclic graphs
Delay budget is an excess delay each component of a design can tolerate under a given timing constraint. Delay budgeting has been widely exploited to improve the design quality. W...
Elaheh Bozorgzadeh, Soheil Ghiasi, Atsushi Takahas...
RECONFIG
2009
IEEE
118views VLSI» more  RECONFIG 2009»
14 years 2 months ago
Protecting the NOEKEON Cipher against SCARE Attacks in FPGAs by Using Dynamic Implementations
Abstract. Protecting an implementation against Side Channel Analysis for Reverse Engineering (SCARE) attacks is a great challenge and we address this challenge by presenting a fir...
Julien Bringer, Hervé Chabanne, Jean-Luc Da...
FCCM
2006
IEEE
121views VLSI» more  FCCM 2006»
14 years 1 months ago
An FPGA Solution for Radiation Dose Calculation
— Radiation dose calculation is an important step in the treatment of cancer patients requiring radiation therapy. It ensures that the physician prescribed dose agrees with the d...
Kevin Whitton, Xiaobo Sharon Hu, Cedric X. Yu, Dan...
FCCM
2002
IEEE
171views VLSI» more  FCCM 2002»
14 years 20 days ago
Coarse-Grain Pipelining on Multiple FPGA Architectures
Reconfigurable systems, and in particular, FPGA-based custom computing machines, offer a unique opportunity to define application-specific architectures. These architectures offer...
Heidi E. Ziegler, Byoungro So, Mary W. Hall, Pedro...
FPL
2010
Springer
210views Hardware» more  FPL 2010»
13 years 5 months ago
A Compact Transactional Memory Multiprocessor System on FPGA
In this paper we present a rapid prototyping platform on a single Field Programmable Gate Array (FPGA) with support for software transactional memory. The system is composed only b...
Matteo Pusceddu, Simone Ceccolini, Gianluca Palerm...