72 search results - page 5 / 15 » An Efficient, Scalable Hardware Engine for Boolean SATisfiab... |
ICCAD
2009
IEEE
13 years 6 months ago
2009
IEEE
Computational protein design can be formulated as an optimization problem, where the objective is to identify the sequence of amino acids that minimizes the energy of a given prot...
ASPDAC
2004
ACM
14 years 1 months ago
2004
ACM
Many important tasks in circuit design and verification can be performed in practice via reductions to Boolean Satisfiability (SAT), making SAT a fundamental EDA problem. However ...
CODES
2005
IEEE
14 years 2 months ago
2005
IEEE
Instruction-set extensible processors allow an existing processor core to be extended with application-specific custom instructions. In this paper, we explore a novel application...
CADE
2008
Springer
14 years 8 months ago
2008
Springer
Satisfiability Modulo Theories (SMT) solvers have proven highly scalable, efficient and suitable for integrated theory reasoning. The most efficient SMT solvers rely on refutationa...
ICCAD
2010
IEEE
13 years 6 months ago
2010
IEEE
Craig Interpolation is a state-of-the-art technique for logic synthesis and verification, based on Boolean Satisfiability (SAT). Leveraging the efficacy of SAT algorithms, Craig In...