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PDCAT
2007
Springer
14 years 1 months ago
A Distributed Virtual Machine for Parallel Graph Reduction
We present the architecture of nreduce, a distributed virtual machine which uses parallel graph reduction to run programs across a set of computers. It executes code written in a ...
Peter M. Kelly, Paul D. Coddington, Andrew L. Wend...
ISCA
2005
IEEE
134views Hardware» more  ISCA 2005»
14 years 29 days ago
An Architecture Framework for Transparent Instruction Set Customization in Embedded Processors
Instruction set customization is an effective way to improve processor performance. Critical portions of application dataflow graphs are collapsed for accelerated execution on s...
Nathan Clark, Jason A. Blome, Michael L. Chu, Scot...
MICRO
2000
IEEE
176views Hardware» more  MICRO 2000»
13 years 7 months ago
An Advanced Optimizer for the IA-64 Architecture
level of abstraction, compared with the program representation for scalar optimizations. For example, loop unrolling and loop unrolland-jam transformations exploit the large regist...
Rakesh Krishnaiyer, Dattatraya Kulkarni, Daniel M....
TSMC
2010
13 years 2 months ago
Probabilistic Model-Based Diagnosis: An Electrical Power System Case Study
Abstract--We present in this paper a case study of the probabilistic approach to model-based diagnosis. Here, the diagnosed system is a real-world electrical power system (EPS), i....
Ole J. Mengshoel, Mark Chavira, Keith Cascio, Scot...
ASPLOS
2011
ACM
12 years 11 months ago
RCDC: a relaxed consistency deterministic computer
Providing deterministic execution significantly simplifies the debugging, testing, replication, and deployment of multithreaded programs. Recent work has developed deterministic...
Joseph Devietti, Jacob Nelson, Tom Bergan, Luis Ce...