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TCAD
2011
13 years 4 months ago
High-Level Synthesis for FPGAs: From Prototyping to Deployment
—Escalating system-on-chip design complexity is the design community to raise the level of abstraction beyond register transfer level. Despite the unsuccessful adoptions of early...
Jason Cong, Bin Liu, Stephen Neuendorffer, Juanjo ...
GECCO
2004
Springer
14 years 3 months ago
Systematic Integration of Parameterized Local Search Techniques in Evolutionary Algorithms
Application-specific, parameterized local search algorithms (PLSAs), in which optimization accuracy can be traded off with runtime, arise naturally in many optimization contexts....
Neal K. Bambha, Shuvra S. Bhattacharyya, Jürg...
GECCO
2003
Springer
103views Optimization» more  GECCO 2003»
14 years 3 months ago
Evaluation of Parameter Sensitivity for Portable Embedded Systems through Evolutionary Techniques
Power consumption and portability issues are becoming increasingly significant in embedded system architectures. Therefore, it is important that chip architects and integrated circ...
James Northern III, Michael A. Shanblatt
DAC
2003
ACM
14 years 11 months ago
Dynamic hardware/software partitioning: a first approach
Partitioning an application among software running on a microprocessor and hardware co-processors in on-chip configurable logic has been shown to improve performance and energy co...
Greg Stitt, Roman L. Lysecky, Frank Vahid
FPL
2005
Springer
100views Hardware» more  FPL 2005»
14 years 4 months ago
Power and Area Optimization for Multiple Restricted Multiplication
This paper presents a design and optimization technique for the Multiple Restricted Multiplication problem [1]. This refers to a situation where a single variable is multiplied by...
Nalin Sidahao, George A. Constantinides, Peter Y. ...