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ICCAD
1996
IEEE
129views Hardware» more  ICCAD 1996»
14 years 2 months ago
Accurate interconnect modeling: towards multi-million transistor chips as microwave circuits
-- In this tutorial we discuss concepts and techniques for the accurate and efficient modeling and extraction of interconnect parasitics in VLSI designs. Due toincreasing operating...
N. P. van der Meijs, T. Smedes
ICCAD
1996
IEEE
78views Hardware» more  ICCAD 1996»
14 years 2 months ago
Design for manufacturability in submicron domain
- Key characteristics of newly emerging IC technologies render the traditional concept of die size minimization and traditional "design rules" insufficient to handle the ...
Wojciech Maly, Hans T. Heineken, Jitendra Khare, P...
VLSID
2006
IEEE
192views VLSI» more  VLSID 2006»
14 years 3 months ago
Beyond RTL: Advanced Digital System Design
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
Shiv Tasker, Rishiyur S. Nikhil
ICES
2007
Springer
88views Hardware» more  ICES 2007»
13 years 11 months ago
Evolving and Analysing "Useful" Redundant Logic
Abstract. Fault Tolerance is an increasing challenge for integrated circuits due to semiconductor technology scaling. This paper looks at how artificial evolution may be tuned to ...
Asbjørn Djupdal, Pauline C. Haddow
ITCC
2005
IEEE
14 years 3 months ago
Pareto-Optimal Hardware for Substitution Boxes
: In this paper, we propose a methodology based on genetic programming to automatically generate hardware designs of substitution boxes necessary for many cryptosystems such as DES...
Nadia Nedjah, Luiza de Macedo Mourelle