118 search results - page 20 / 24 » An Execution Architecture for Synchronized Multimedia Presen... |
ICPP
1999
IEEE
14 years 26 days ago
1999
IEEE
This paper describes the challenges presented by singlechip parallel media processors (PMPs). These machines integrate multiple parallel function units, instruction execution, and...
DATE
2009
IEEE
14 years 3 months ago
2009
IEEE
—More and more processor manufacturers have launched embedded multicore processors for consumer electronics products because such processors provide high performance and low powe...
ASPDAC
2004
ACM
14 years 9 days ago
2004
ACM
While mapping a streaming (such as multimedia or network packet processing) application onto a specified architecture, an important issue is to determine the input stream rates tha...
EUROPAR
2007
Springer
14 years 2 months ago
2007
Springer
Abstract. Hardware Transactional Memory (HTM) gives software developers the opportunity to write parallel programs more easily compared to any previous programming method, and yiel...
DATE
1999
IEEE
14 years 26 days ago
1999
IEEE
Dynamically reconfigurable embedded systems offer potential for higher performance as well as adaptability to changing system requirements at low cost. Such systems employ run-tim...