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» An Improved Resource Reservation Algorithm for IEEE 802.15.3
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DSD
2010
IEEE
172views Hardware» more  DSD 2010»
13 years 9 months ago
Adaptive Cache Memories for SMT Processors
Abstract—Resizable caches can trade-off capacity for access speed to dynamically match the needs of the workload. In Simultaneous Multi-Threaded (SMT) cores, the caching needs ca...
Sonia López, Oscar Garnica, David H. Albone...
INFOCOM
2012
IEEE
11 years 11 months ago
Uplink soft frequency reuse for self-coexistence of cognitive radio networks operating in white-space spectrum
—Recent advances in cognitive radio (CR) technology have brought about a number of wireless standards that support opportunistic access to available white-space spectrum. Address...
Bo Gao, Jung-Min Park 0001, Yaling Yang
SLIP
2005
ACM
14 years 2 months ago
Multilevel full-chip routing with testability and yield enhancement
We propose in this paper a multilevel full-chip routing algorithm that improves testability and diagnosability, manufacturability, and signal integrity for yield enhancement. Two ...
Katherine Shu-Min Li, Chung-Len Lee, Yao-Wen Chang...
VISUALIZATION
2000
IEEE
14 years 1 months ago
Isosurfacing in higher dimensions
Visualization algorithms have seen substantial improvements in the past several years. However, very few algorithms have been developed for directly studying data in dimensions hi...
Praveen Bhaniramka, Rephael Wenger, Roger Crawfis
ICDE
2010
IEEE
248views Database» more  ICDE 2010»
14 years 9 months ago
FPGA Acceleration for the Frequent Item Problem
Abstract-- Field-programmable gate arrays (FPGAs) can provide performance advantages with a lower resource consumption (e.g., energy) than conventional CPUs. In this paper, we show...
Gustavo Alonso, Jens Teubner, René Mül...