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ATS
1998
IEEE
170views Hardware» more  ATS 1998»
14 years 1 months ago
A Ring Architecture Strategy for BIST Test Pattern Generation
This paper presents a new effective Built-In Self Test (BIST) scheme that achieves 100% fault coverage with low area overhead, and without any modification of the circuit under tes...
Christophe Fagot, Olivier Gascuel, Patrick Girard,...
DATE
2008
IEEE
131views Hardware» more  DATE 2008»
14 years 3 months ago
Optimal High-Resolution Spectral Analyzer
This paper presents a new application field for the Goertzel algorithm. The test of mixed-signal circuits involves the generation and analysis of signals. A standard method for th...
A. Tchegho, Heinz Mattes, Sebastian Sattler
EVOW
2001
Springer
14 years 1 months ago
ARPIA: A High-Level Evolutionary Test Signal Generator
The integrated circuits design flow is rapidly moving towards higher description levels. However, test-related activities are lacking behind this trend, mainly since effective faul...
Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda...
CG
2005
Springer
13 years 8 months ago
An algorithm for tetrahedral mesh generation based on conforming constrained Delaunay tetrahedralization
An unstructured tetrahedral mesh generation algorithm for 3D model with constraints is presented. To automatically generate a tetrahedral mesh for model with constraints, an advan...
Yi-Jun Yang, Jun-Hai Yong, Jia-Guang Sun
DSD
2010
IEEE
171views Hardware» more  DSD 2010»
13 years 7 months ago
Test Patterns Compression Technique Based on a Dedicated SAT-Based ATPG
— In this paper we propose a new method of test patterns compression based on a design of a dedicated SAT-based ATPG (Automatic Test Pattern Generator). This compression method i...
Jiri Balcarek, Petr Fiser, Jan Schmidt