In this paper, we develop a probabilistic model for estimation of the numbers of cache misses during the sparse matrix-vector multiplication (for both general and symmetric matrice...
In this work, we propose a visual, custom-designed, event-driven interconnect simulation framework to evaluate the performance of off-chip multi-processor/memory communications ar...
As high-level models in C and SystemC are increasingly used for verification and even design (through high-level synthesis) of electronic systems, there is a growing need for com...
Increasing demand for performance and efficiency has driven the computer industry toward multicore systems. These systems have become the industry standard in almost all segments...
Amir Hormati, Yoonseo Choi, Manjunath Kudlur, Rodr...
In order to achieve the best application-level Quality-of-Service (QoS), multimedia applications need to be dynamically tuned and reconfigured to adapt to fluctuating computing an...