69 search results - page 5 / 14 » An event-guided approach to reducing voltage noise in proces... |
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
The placement of on-die decoupling capacitors (decap) between the power and ground supply grids has become a common practice in high performance processor designs. In this paper, ...
ASPDAC
2007
ACM
13 years 12 months ago
2007
ACM
This paper proposes Noise-Direct, a design methodology for power integrity aware floorplanning, using microarchitectural feedback to guide module placement. Stringent power constr...
RTSS
1998
IEEE
14 years 4 days ago
1998
IEEE
The energy efficiency of systems-on-a-chip can be much improved if one were to vary the supply voltage dynamically at run time. In this paper we describe the synthesis of systems-...
ICCAD
1998
IEEE
14 years 5 days ago
1998
IEEE
Presented in this paper are 1) information-theoretic lower bounds on energy consumption of noisy digital gates and 2) the concept of noise tolerance via coding for achieving energy...
LCPC
2004
Springer
14 years 1 months ago
2004
Springer
Techniques to reduce power dissipation for embedded systems have recently come into sharp focus in the technology development. Among these techniques, dynamic voltage scaling (DVS)...