67 search results - page 7 / 14 » An integrated floorplanning with an efficient buffer plannin... |
SLIP
2009
ACM
14 years 3 months ago
2009
ACM
As technology advances, 3D ICs are introduced for alleviating the interconnect problem coming with shrinking feature size and increasing integration density. In 3D ICs, one of the...
ISQED
2007
IEEE
14 years 2 months ago
2007
IEEE
The virtual channel flow control (VCFC) provides an efficient implementation for on-chip networks. However, allocating the virtual channels (VCs) uniformly results in a waste of a...
ISQED
2005
IEEE
14 years 2 months ago
2005
IEEE
Hierarchical approach greatly facilitates large-scale chip design by hiding distracting details in low-level objects. However, the lowlevel designs have to have a global view of h...
VLDB
1995
ACM
14 years 3 days ago
1995
ACM
We describe an eficient server-based algorithm for garbage collecting object-oriented databases in a client/server environment. The algorithm is incremental and runs concurrently ...
TVLSI
2010
13 years 3 months ago
2010
Clock network is a vulnerable victim of variations as well as a main power consumer in many integrated circuits. Recently, link-based non-tree clock network attracts people's...