117 search results - page 20 / 24 » An optimal algorithm for sizing sequential circuits for indu... |
FPGA
2003
ACM
14 years 20 days ago
2003
ACM
The routing channels of an FPGA consist of wire segments of various types providing the tradeoff between performance and routability. In the routing architectures of recently dev...
DAC
2008
ACM
14 years 8 months ago
2008
ACM
An effective technique to save power during scan based test is to switch off unused scan chains. The results obtained with this method strongly depend on the mapping of scan flip-...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
In a synchronous finite state machine (FSM), huge current peaks are often observed at the moment of state transition. Previous low power state encoding algorithms focus on the red...
CASES
2008
ACM
13 years 9 months ago
2008
ACM
While customizable processors aim at combining the flexibility of general purpose processors with the speed and power advantages of custom circuits, commercially available process...
DAC
2005
ACM
13 years 9 months ago
2005
ACM
This paper presents a novel placement algorithm for timing optimization based on a new and powerful concept, which we term differential timing analysis. Recognizing that accurate ...