The scaling of CMOS technology into the nanometer era enables the fabrication of highly integrated systems, which increasingly contain analog and/or RF parts. However, scaling into...
The designer needs simple and accurate models to estimate noise in MOS transistors as a function of their size, bias point and technology. In this work, we present a simple, conti...
Several research groups are implementing analog integrated circuit models of biological auditory processing. The outputs of these circuit models have taken several forms, includin...
John Lazzaro, John Wawrzynek, Misha Mahowald, Mass...
We propose a method to minimize power dissipation in current-mode CMOS analog and multiple-valued logic (MVL) circuits employing a stack of current comparators. First, we present ...
This paper proposes an equation-based multi-scenario iterative robust optimization methodology for analog/mixed-signal circuits. We show that due to local circuit performance mono...