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VLSID
2001
IEEE
164views VLSI» more  VLSID 2001»
14 years 7 months ago
An Efficient Parallel Transparent Bist Method For Multiple Embedded Memory Buffers
In this paper, we propose a new transparent built-in self-test ( TBIST ) method to test multiple embedded memory arrays with various sizes in parallel. First, a new transparent tes...
Der-Cheng Huang, Wen-Ben Jone, Sunil R. Das
ICCAD
2006
IEEE
183views Hardware» more  ICCAD 2006»
14 years 4 months ago
Soft error derating computation in sequential circuits
Soft error tolerant design becomes more crucial due to exponential increase in the vulnerability of computer systems to soft errors. Accurate estimation of soft error rate (SER), ...
Hossein Asadi, Mehdi Baradaran Tahoori
ICCAD
2009
IEEE
132views Hardware» more  ICCAD 2009»
13 years 5 months ago
DynaTune: Circuit-level optimization for timing speculation considering dynamic path behavior
Traditional circuit design focuses on optimizing the static critical paths no matter how infrequently these paths are exercised dynamically. Circuit optimization is then tuned to ...
Lu Wan, Deming Chen
EURODAC
1994
IEEE
145views VHDL» more  EURODAC 1994»
13 years 11 months ago
Testability analysis and improvement from VHDL behavioral specifications
This paper presents a testability improvement method for digital systems described in VHDL behavioral specification. The method is based on testability analysis at registertransfe...
Xinli Gu, Krzysztof Kuchcinski, Zebo Peng
ICIAR
2007
Springer
14 years 1 months ago
Color-Based Road Sign Detection and Tracking
This paper describes a general framework for the detection and tracking of traffic and road signs from image sequences using only color information. The approach consists of two in...
Luis David Lopez, Olac Fuentes