118 search results - page 10 / 24 » Analysis and modeling of CD variation for statistical static... |
DATE
2008
IEEE
14 years 2 months ago
2008
IEEE
—Latch based circuits are widely adopted in high performance circuits. But there is a lack of accurate latch models for doing timing analysis. In this paper, we propose a new lat...
DAC
2005
ACM
13 years 9 months ago
2005
ACM
Variability of process parameters makes prediction of digital circuit timing characteristics an important and challenging problem in modern chip design. Recently, statistical stat...
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
Statistical static timing analysis (SSTA) is emerging as a solution for predicting the timing characteristics of digital circuits under process variability. For computing the stat...
DAC
2006
ACM
14 years 8 months ago
2006
ACM
A statistical model for the purpose of logic cell timing analysis in the presence of process variations is presented. A new current-based cell delay model is utilized, which can a...
CODES
2010
IEEE
13 years 5 months ago
2010
IEEE
The impact of process variation in state of the art technology makes traditional (worst case) designs unnecessarily pessimistic, which translates to suboptimal designs in terms of...