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» Analysis of SEU Effects in a Pipelined Processor
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CGO
2004
IEEE
13 years 11 months ago
Probabilistic Predicate-Aware Modulo Scheduling
Predicated execution enables the removal of branches by converting segments of branching code into sequences of conditional operations. An important side effect of this transforma...
Mikhail Smelyanskiy, Scott A. Mahlke, Edward S. Da...
ICCAD
2006
IEEE
169views Hardware» more  ICCAD 2006»
14 years 4 months ago
Microarchitecture parameter selection to optimize system performance under process variation
Abstract— Design variability due to within-die and die-todie process variations has the potential to significantly reduce the maximum operating frequency and the effective yield...
Xiaoyao Liang, David Brooks
MICRO
2002
IEEE
109views Hardware» more  MICRO 2002»
14 years 11 days ago
Using modern graphics architectures for general-purpose computing: a framework and analysis
Recently, graphics hardware architectures have begun to emphasize versatility, offering rich new ways to programmatically reconfigure the graphics pipeline. In this paper, we exp...
Chris J. Thompson, Sahngyun Hahn, Mark Oskin
FPL
2010
Springer
146views Hardware» more  FPL 2010»
13 years 5 months ago
Software Managed Distributed Memories in MPPAs
When utilizing reconfigurable hardware there are many applications that will require more memory than is available in a single hardware block. While FPGAs have tools and mechanisms...
Robin Panda, Jimmy Xu, Scott Hauck
ISCA
2005
IEEE
118views Hardware» more  ISCA 2005»
14 years 1 months ago
Continuous Optimization
This paper presents a hardware-based dynamic optimizer that continuously optimizes an application’s instruction stream. In continuous optimization, dataflow optimizations are p...
Brian Fahs, Todd M. Rafacz, Sanjay J. Patel, Steve...