Sciweavers

99 search results - page 1 / 20
» Analysis of power consumption in memory hierarchies
Sort
View
ISLPED
1997
ACM
114views Hardware» more  ISLPED 1997»
14 years 3 months ago
Analysis of power consumption in memory hierarchies
In this paper, we note and analyze a key trade-off: as the complexity of caches increases (higher set-associativity, larger block size, and larger overall size), the power consume...
Patrick Hicks, Matthew Walnock, Robert Michael Owe...
DATE
2004
IEEE
146views Hardware» more  DATE 2004»
14 years 2 months ago
Data Reuse Analysis Technique for Software-Controlled Memory Hierarchies
In multimedia and other streaming applications a significant portion of energy is spent on data transfers. Exploiting data reuse opportunities in the application, we can reduce th...
Ilya Issenin, Erik Brockmeyer, Miguel Miranda, Nik...
FPL
2003
Springer
120views Hardware» more  FPL 2003»
14 years 4 months ago
Power-Efficient Implementations of Multimedia Applications on Reconfigurable Platforms
The power-efficient implementation of motion estimation algorithms on a system comprised by an FPGA and an external memory is presented. Low power consumption is achieved by implem...
Konstantinos Tatas, K. Siozios, Dimitrios Soudris,...
ISCA
2011
IEEE
294views Hardware» more  ISCA 2011»
13 years 2 months ago
Moguls: a model to explore the memory hierarchy for bandwidth improvements
In recent years, the increasing number of processor cores and limited increases in main memory bandwidth have led to the problem of the bandwidth wall, where memory bandwidth is b...
Guangyu Sun, Christopher J. Hughes, Changkyu Kim, ...
ASAP
2005
IEEE
104views Hardware» more  ASAP 2005»
14 years 4 months ago
Power Breakdown Analysis for a Heterogeneous NoC Platform Running a Video Application
Users expect future handhelddevices to provide extended multimedia functionality and have long battery life. This type of application imposes heavy constraints on performance and ...
Andy Lambrechts, Praveen Raghavan, Anthony Leroy, ...