Sciweavers

86 search results - page 3 / 18
» Analytical modeling and evaluation of network-on-chip archit...
Sort
View
MASCOTS
2001
13 years 8 months ago
A Modular, Analytical Throughput Model for Modern Disk Arrays
Enterprise storage systems depend on disk arrays for their capacity and availability needs. To design and maintain storage systems that efficiently satisfy evolving requirements, ...
Mustafa Uysal, Guillermo A. Alvarez, Arif Merchant
DATE
2007
IEEE
173views Hardware» more  DATE 2007»
14 years 1 months ago
Analytical router modeling for networks-on-chip performance analysis
Networks-on-Chip (NoCs) have recently emerged as a scalable alternative to classical bus and point-to-point architectures. To date, performance evaluation of NoC designs is largel...
Ümit Y. Ogras, Radu Marculescu
VLSID
2004
IEEE
117views VLSI» more  VLSID 2004»
14 years 7 months ago
Evaluating the Reliability of Defect-Tolerant Architectures for Nanotechnology with Probabilistic Model Checking
As we move from deep submicron technology to nanotechnology for device manufacture, the need for defect-tolerant architectures is gaining importance. This is because, at the nanos...
Gethin Norman, David Parker, Marta Z. Kwiatkowska,...
DAC
2002
ACM
14 years 8 months ago
A framework for evaluating design tradeoffs in packet processing architectures
We present an analytical method to evaluate embedded network packet processor architectures, and to explore their design space. Our approach is in contrast to those based on simul...
Lothar Thiele, Matthias Gries, Samarjit Chakrabort...
JUCS
2008
186views more  JUCS 2008»
13 years 6 months ago
Model Interpreter Frameworks: A Foundation for the Analysis of Domain-Specific Software Architectures
: Prediction of the quality attributes of software architectures requires technologies that enable the application of analytic theories to component models. However, available anal...
George Edwards, Chiyoung Seo, Nenad Medvidovic