422 search results - page 33 / 85 » Application mapping for chip multiprocessors |
168
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CODES
2007
IEEE
15 years 6 months ago
2007
IEEE
In this paper, we propose an efficient technique for run-time application mapping onto Network-on-Chip (NoC) platforms with multiple voltage levels. Our technique consists of a re...
132
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ISSS
2002
IEEE
15 years 9 months ago
2002
IEEE
In this paper, we present a new methodology for application specific multiprocessor system-on-chip design. This approach facilitates the integration of existing components with th...
132
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SAMOS
2007
Springer
15 years 10 months ago
2007
Springer
The computational demand of signal processing algorithms is rising continuously. Heterogeneous embedded multiprocessor systems-on-chips are one solution to tackle this demand. But ...
136
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FPL
2009
Springer
15 years 8 months ago
2009
Springer
This paper investigates the challenges of run-time resource management in future coarse-grained network-onreconfigurable-chips (NoRCs). Run-time reconfiguration is a key feature e...
147
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ICCD
2006
IEEE
16 years 1 months ago
2006
IEEE
Technology trends are driving parallel on-chip architectures in the form of multi-processor systems-on-a-chip (MPSoCs) and chip multi-processors (CMPs). In these systems the incre...