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JMM2
2006
126views more  JMM2 2006»
13 years 8 months ago
Modeling Augmented Reality User Interfaces with SSIML/AR
Augmented Reality (AR) technologies open up new possibilities especially for task-focused domains such as assembly and maintenance. However, it can be noticed that there is still a...
Arnd Vitzthum, Heinrich Hussmann
FPGA
2007
ACM
142views FPGA» more  FPGA 2007»
14 years 2 months ago
Parametric yield in FPGAs due to within-die delay variations: a quantitative analysis
Variations in the semiconductor fabrication process results in variability in parameters between transistors on the same die, a problem exacerbated by lithographic scaling. The re...
N. Pete Sedcole, Peter Y. K. Cheung
IJCNN
2006
IEEE
14 years 2 months ago
In Situ Training of CMOL CrossNets
—— Hybrid semiconductor/nanodevice (“CMOL”) technology may allow the implementation of digital and mixed-signal integrated circuits, including artificial neural networks (...
Jung Hoon Lee, Konstantin Likharev
ISLPED
2005
ACM
110views Hardware» more  ISLPED 2005»
14 years 1 months ago
Complexity reduction in an nRERL microprocessor
We describe an adiabatic microprocessor implemented with a reversible logic, nRERL [1]. We employed an 8-phase clocked power instead of 6-phase one to reduce the number of buffers...
Seokkee Kim, Soo-Ik Chae
DATE
2010
IEEE
168views Hardware» more  DATE 2010»
14 years 1 months ago
A new placement algorithm for the mitigation of multiple cell upsets in SRAM-based FPGAs
Modern FPGAs have been designed with advanced integrated circuit techniques that allow high speed and low power performance, joined to reconfiguration capabilities. This makes new...
Luca Sterpone, Niccolò Battezzati