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ISCA
1993
IEEE
157views Hardware» more  ISCA 1993»
14 years 2 days ago
The Performance of Cache-Coherent Ring-based Multiprocessors
Advances in circuit and integration technology are continuously boosting the speed of microprocessors. One of the main challenges presented by such developments is the effective u...
Luiz André Barroso, Michel Dubois
ASPDAC
2009
ACM
184views Hardware» more  ASPDAC 2009»
13 years 12 months ago
FastRoute 4.0: global router with efficient via minimization
The number of vias generated during the global routing stage is a critical factor for the yield of final circuits. However, most global routers only approach the problem by chargin...
Yue Xu, Yanheng Zhang, Chris Chu
ASPDAC
2007
ACM
98views Hardware» more  ASPDAC 2007»
13 years 12 months ago
Fast Analytic Placement using Minimum Cost Flow
Many current integrated circuits designs, such as those released for the ISPD2005[14] placement contest, are extremely large and can contain a great deal of white space. These new...
Ameya R. Agnihotri, Patrick H. Madden
ASPDAC
2007
ACM
96views Hardware» more  ASPDAC 2007»
13 years 12 months ago
Hierarchical Optimization Methodology for Wideband Low Noise Amplifiers
In this paper, we present a systematic synthesis methodology for fully integrated wideband low noise amplifiers that simultaneously optimizes impedance matching, noise figure, and ...
Arthur Nieuwoudt, Tamer Ragheb, Yehia Massoud
ASPDAC
2007
ACM
101views Hardware» more  ASPDAC 2007»
13 years 12 months ago
Core-Based Testing of Multiprocessor System-on-Chips Utilizing Hierarchical Functional Buses
Abstract--An integrated test scheduling methodology for multiprocessor System-on-Chips (SOC) utilizing the functional buses for test data delivery is described. The proposed method...
Fawnizu Azmadi Hussin, Tomokazu Yoneda, Alex Orail...