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DAC
2005
ACM
13 years 9 months ago
Multi-frequency wrapper design and optimization for embedded cores under average power constraints
This paper presents a new method for designing test wrappers for embedded cores with multiple clock domains. By exploiting the use of multiple shift frequencies, the proposed meth...
Qiang Xu, Nicola Nicolici, Krishnendu Chakrabarty
CVPR
2008
IEEE
13 years 9 months ago
Demosaicking recognition with applications in digital photo authentication based on a quadratic pixel correlation model
Most digital still color cameras use a single electronic sensor (CCD or CMOS) overlaid with a color filter array. At each pixel location only one color sample is taken, and the ot...
Yizhen Huang, Yangjing Long
DAC
2008
ACM
13 years 9 months ago
Protecting bus-based hardware IP by secret sharing
Our work addresses protection of hardware IP at the mask level with the goal of preventing unauthorized manufacturing. The proposed protocol based on chip locking and activation i...
Jarrod A. Roy, Farinaz Koushanfar, Igor L. Markov
FPGA
2008
ACM
163views FPGA» more  FPGA 2008»
13 years 9 months ago
TORCH: a design tool for routing channel segmentation in FPGAs
A design tool for routing channel segmentation in islandstyle FPGAs is presented. Given the FPGA architecture parameters and a set of benchmark designs, the tool optimizes routing...
Mingjie Lin, Abbas El Gamal
ISLPED
2007
ACM
94views Hardware» more  ISLPED 2007»
13 years 9 months ago
Design of an efficient power delivery network in an soc to enable dynamic power management
Dynamic voltage scaling (DVS) is known to be one of the most efficient techniques for power reduction of integrated circuits. Efficient low voltage DC-DC conversion is a key enabl...
Behnam Amelifard, Massoud Pedram