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ASPDAC
2011
ACM
207views Hardware» more  ASPDAC 2011»
12 years 12 months ago
Vertical interconnects squeezing in symmetric 3D mesh Network-on-Chip
Abstract— Three-dimensional (3D) integration and Networkon-Chip (NoC) are both proposed to tackle the on-chip interconnect scaling problems, and extensive research efforts have b...
Cheng Liu, Lei Zhang 0008, Yinhe Han, Xiaowei Li
ICCAD
2006
IEEE
124views Hardware» more  ICCAD 2006»
14 years 5 months ago
Simultaneous power and thermal integrity driven via stapling in 3D ICs
The existing work on via-stapling in 3D integrated circuits optimizes power and thermal integrity separately and uses steadystate thermal analysis. This paper presents the first ...
Hao Yu, Joanna Ho, Lei He
ISCAS
1999
IEEE
102views Hardware» more  ISCAS 1999»
14 years 16 days ago
Power and signal integrity improvement in ultra high-speed current mode logic
Current mode (ECL) logic has long been the option of choice in those applications requiring logic functions at multigigahertz rates. This trend continues despite the obvious very ...
Hien Ha, Forrest Brewer
VTS
2006
IEEE
95views Hardware» more  VTS 2006»
14 years 2 months ago
Integrated CMOS Power Sensors for RF BIST Applications
This paper presents the design and experimental results of fully integrated CMOS power sensors for RF built-in self-test (BIST) applications. Using a standard 0.18- m CMOS process...
Hsieh-Hung Hsieh, Liang-Hung Lu
ITC
2000
IEEE
80views Hardware» more  ITC 2000»
14 years 19 days ago
A stand-alone integrated test core for time and frequency domain measurements
An area efficient and robust integrated test core for mixed-signal circuits is described. The core consists of a completely digital implementation, except for a simple reconstructi...
Mohamed Hafed, Nazmy Abaskharoun, Gordon W. Robert...