1398 search results - page 9 / 280 » Application-Specific Integrated Circuits |
ISCAS
2002
IEEE
2002
IEEE
Latchup current self-stop circuit for whole-chip latchup prevention in bulk CMOS integrated circuits
14 years 19 days ago
A latchup current self-stop methodology and circuit design, which are used to prevent damage in the bulk CMOS integrated circuits due to latchup, are proposed in this paper. In a ...
ISQED
2002
IEEE
14 years 19 days ago
2002
IEEE
In this paper, we describe a comprehensive layout methodology for bonded three-dimensional integrated circuits (3D ICs). In bonded 3D integration technology, parts of a circuit ar...
DAC
1999
ACM
14 years 1 days ago
1999
ACM
This paper presents a method to reduce the complexity of a linear or linearized (small-signal) analog circuit. The reduction technique, based on quality-error ranking, can be used...
IEICET
2008
13 years 7 months ago
2008
MR
2007
13 years 7 months ago
2007
CDM ESD event has become the main ESD reliability concern for integrated-circuits products using nanoscale CMOS technology. A novel CDM ESD protection design, using self-biased cu...