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ASPDAC
2010
ACM
165views Hardware» more  ASPDAC 2010»
13 years 5 months ago
Dynamic power estimation for deep submicron circuits with process variation
- Dynamic power consumption in CMOS circuits is usually estimated based on the number of signal transitions. However, when considering glitches, this is not accurate because narrow...
Quang Dinh, Deming Chen, Martin D. F. Wong
GLVLSI
2008
IEEE
147views VLSI» more  GLVLSI 2008»
14 years 1 months ago
Statistical timing analysis of flip-flops considering codependent setup and hold times
Statistical static timing analysis (SSTA) plays a key role in determining performance of the VLSI circuits implemented in state-of-the-art CMOS technology. A pre-requisite for emp...
Safar Hatami, Hamed Abrishami, Massoud Pedram
DATE
2008
IEEE
112views Hardware» more  DATE 2008»
14 years 1 months ago
Adaptive Simulation for Single-Electron Devices
Single-electron devices have drawn much attention in the last two decades. They have been widely used for device research and also show promise as a potential alternative to compl...
Nicholas Allec, Robert G. Knobel, Li Shang
ICCAD
2008
IEEE
122views Hardware» more  ICCAD 2008»
14 years 4 months ago
Network flow-based power optimization under timing constraints in MSV-driven floorplanning
Abstract— Power consumption has become a crucial problem in modern circuit design. Multiple Supply Voltage (MSV) design is introduced to provide higher flexibility in controllin...
Qiang Ma, Evangeline F. Y. Young
IJNS
2000
130views more  IJNS 2000»
13 years 7 months ago
A Programmable VLSI Filter Architecture for Application in Real-Time Vision Processing Systems
An architecture is proposed for the realization of real-time edge-extraction filtering operation in an Address-Event-Representation (AER) vision system. Furthermore, the approach ...
Teresa Serrano-Gotarredona, Andreas G. Andreou, Be...