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ICCD
2007
IEEE
121views Hardware» more  ICCD 2007»
14 years 4 months ago
Fast power network analysis with multiple clock domains
This paper proposes an efficient analysis flow and an algorithm to identify the worst case noise for power networks with multiple clock domains. First, we apply the Laplace transf...
Wanping Zhang, Ling Zhang, Rui Shi, He Peng, Zhi Z...
MICRO
2008
IEEE
116views Hardware» more  MICRO 2008»
14 years 2 months ago
Power reduction of CMP communication networks via RF-interconnects
As chip multiprocessors scale to a greater number of processing cores, on-chip interconnection networks will experience dramatic increases in both bandwidth demand and power dissi...
M.-C. Frank Chang, Jason Cong, Adam Kaplan, Chunyu...
DATE
2006
IEEE
122views Hardware» more  DATE 2006»
14 years 1 months ago
Power analysis of mobile 3D graphics
— The world of 3D graphics, until recently restricted to high-end workstations and game consoles, is rapidly expanding into the domain of mobile platforms such as cellular phones...
Bren Mochocki, Kanishka Lahiri, Srihari Cadambi
WEA
2004
Springer
150views Algorithms» more  WEA 2004»
14 years 1 months ago
Increased Bit-Parallelism for Approximate String Matching
Abstract. Bit-parallelism permits executing several operations simultaneously over a set of bits or numbers stored in a single computer word. This technique permits searching for t...
Heikki Hyyrö, Kimmo Fredriksson, Gonzalo Nava...
BMCBI
2007
172views more  BMCBI 2007»
13 years 7 months ago
msBayes: Pipeline for testing comparative phylogeographic histories using hierarchical approximate Bayesian computation
Background: Although testing for simultaneous divergence (vicariance) across different population-pairs that span the same barrier to gene flow is of central importance to evoluti...
Michael J. Hickerson, Eli Stahl, Naoki Takebayashi