In this paper, we study the instruction cache miss behavior of four modern commercial applications (a database workload, TPC-W, SPECjAppServer2002 and SPECweb99). These applicatio...
To sustain instruction throughput rates in more aggressively clocked microarchitectures, microarchitects have incorporated larger and more complex branch predictors into their des...
With the scaling of technology and the need for higher performance and more functionality, power dissipation is becoming a major bottleneck for microprocessor designs. Pipeline ba...
Hai Li, Swarup Bhunia, Yiran Chen, T. N. Vijaykuma...
With the increasing clock rate and transistor count of today's microprocessors, power dissipation is becoming a critical component of system design complexity. Thermal and po...
The recent emergence of network interface cards (NICs) with diverse hardware features for I/O virtualization poses an important challenge for virtual machine environments, particu...
Jose Renato Santos, Yoshio Turner, Jayaram Mudigon...