268 search results - page 9 / 54 » Architectural descriptions for FPGA circuits |
MEMOCODE
2010
IEEE
13 years 6 months ago
2010
IEEE
This paper presents a working solution for the MEMOCODE 2010 design contest. The design presented in this paper is implemented in the Xilinx V5LX330 FPGA as a custom circuit. The s...
FPGA
1999
ACM
14 years 28 days ago
1999
ACM
In this paper, we investigate the speed and area-efficiency of FPGAs employing “logic clusters” containing multiple LUTs and registers as their logic block. We introduce a ne...
ICES
1998
Springer
14 years 27 days ago
1998
Springer
In this paper we present a new chromosome representation for evolving digital circuits. The representation is based very closely on the chip architecture of the Xilinx 6216 FPGA. W...
JSA
2007
13 years 8 months ago
2007
This paper presents a multi-language framework to FPGA hardware development which aims to satisfy the dual requirement of high level hardware design and efficient hardware impleme...
ICCD
2007
IEEE
14 years 5 months ago
2007
IEEE
Low energy and small switch area usage are two of the important design objectives in FPGA global routing architecture design. This paper presents an improved MCF model based CAD ...