110 search results - page 14 / 22 » Architectural simulation for a programmable DSP chip set |
DAC
1999
ACM
14 years 8 months ago
1999
ACM
We present a framework for rapidly exploring the design space of low power application-specific programmable processors (ASPP), in particular mediaprocessors. We focus on a catego...
ICCD
2002
IEEE
14 years 4 months ago
2002
IEEE
The Imagine Stream Processor is a single-chip programmable media processor with 48 parallel ALUs. At 400 MHz, this translates to a peak arithmetic rate of 16 GFLOPS on single-prec...
ICCD
1999
IEEE
13 years 11 months ago
1999
IEEE
Current trends in DRAM memory chip fabrication have led many researchers to propose \intelligent memory" architectures that integrate microprocessors or logic with memory. Su...
ISCA
2007
IEEE
14 years 1 months ago
2007
IEEE
Much like multi-storey buildings in densely packed metropolises, three-dimensional (3D) chip structures are envisioned as a viable solution to skyrocketing transistor densities an...
MICRO
2008
IEEE
14 years 1 months ago
2008
IEEE
Significant improvement to visual quality for real-time 3D graphics requires modeling of complex illumination effects like soft-shadows, reflections, and diffuse lighting intera...