110 search results - page 4 / 22 » Architectural simulation for a programmable DSP chip set |
DAC
1996
ACM
13 years 11 months ago
1996
ACM
This paper discusses the design of a chip using architectural synthesis. The chip, FADIC, is applied in Digital Audio Broadcasting (DAB) receivers. It shows that architectural syn...
DAC
2003
ACM
14 years 19 days ago
2003
ACM
Instruction set simulators are critical tools for the exploration and validation of new programmable architectures. Due to increasing complexity of the architectures and timeto-ma...
VLSISP
1998
13 years 7 months ago
1998
This paper describes the architecture and the performance of a new programmable 16-bit Digital Signal Processor (DSP) engine. It is developed specifically for next generation wire...
DAC
1997
ACM
13 years 11 months ago
1997
ACM
An experimental set of tools that generate instruction set simulators, assemblers, and disassemblers from a single description was developed to test if retargetable development to...
CASES
2007
ACM
13 years 11 months ago
2007
ACM
Instruction Set Simulators (ISSes) are important tools for cross-platform software development. The simulation speed is a major concern and many approaches have been proposed to i...