430 search results - page 74 / 86 » Architectural support for hypervisor-secure virtualization |
ISCA
2010
IEEE
13 years 9 months ago
2010
IEEE
This paper explores the design space of MMU caches that accelerate virtual-to-physical address translation in processor architectures, such as x86-64, that use a radix tree page t...
HPCA
2005
IEEE
14 years 8 months ago
2005
IEEE
Hardware transactional memory should support unbounded transactions: transactions of arbitrary size and duration. We describe a hardware implementation of unbounded transactional ...
PLDI
2005
ACM
14 years 1 months ago
2005
ACM
Ad-hoc networks of mobile devices such as smart phones and PDAs represent a new and exciting distributed system architecture. Building distributed applications on such an architec...
ISLPED
2004
ACM
14 years 1 months ago
2004
ACM
While set-associative caches incur fewer misses than directmapped caches, they typically have slower hit times and higher power consumption, when multiple tag and data banks are p...
SIGGRAPH
2010
ACM
14 years 4 days ago
2010
ACM
The NVIDIA® OptiX™ ray tracing engine is a programmable system designed for NVIDIA GPUs and other highly parallel architectures. The OptiX engine builds on the key observation ...