23406 search results - page 141 / 4682 » Architecture, Design, Implementation |
134
Voted
ISLPED
1997
ACM
15 years 7 months ago
1997
ACM
Significand pre-alignment is a pre requisite for floating point additions. This paper1 addresses the architectural design and energy delay evaluation of a Low Power Barrel Switch ...
122
Voted
APCSAC
2001
IEEE
15 years 7 months ago
2001
IEEE
During processor design, it is often necessary to evaluate multiple cache configurations. This paper describes the design and implementation of a retargetable on-line cache simula...
141
Voted
ASAP
2009
IEEE
15 years 1 months ago
2009
IEEE
This paper examines the architecture, algorithm and implementation of a switch-based multi-processor realization of the fast Fourier transform (FFT). The architecture employs M pr...
143
Voted
ICCD
2007
IEEE
16 years 18 days ago
2007
IEEE
In single processor architectures, computationallyintensive functions are typically accelerated using hardware accelerators, which exploit the concurrency in the function code to ...
112
Voted
SIGMETRICS
2006
ACM
15 years 9 months ago
2006
ACM
In this paper, we present a new metric, Hard-Fault Architectural Vulnerability Factor (H-AVF), to allow designers to more effectively compare alternate hard-fault tolerance scheme...