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ARITH
1999
IEEE
15 years 8 months ago
1999
IEEE
The design and implementation of a double precision floating-point IEEE-754 standard adder is described which uses "flagged prefix addition" to merge rounding with the s...
146
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CODES
2006
IEEE
15 years 9 months ago
2006
IEEE
Process variability has a detrimental impact on the performance of memories and other system components, which can lead to parametric yield loss at the system level due to timing ...
138
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IPPS
2007
IEEE
15 years 10 months ago
2007
IEEE
The rapid revolution in microprocessor chip architecture due to multicore technology is presenting unprecedented challenges to the application developers as well as system softwar...
152
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SCESM
2006
ACM
15 years 9 months ago
2006
ACM
An important step in the development of large-scale distributed reactive systems is the design of effective system architectures. The early availability of prototypes facilitates...
176
Voted
VLSID
2001
IEEE
16 years 4 months ago
2001
IEEE
The emergence of several communication architectures for System-on-Chips provides designers with a variety of design alternatives. In addition, the need to customize the system ar...