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FPL
2003
Springer
164views Hardware» more  FPL 2003»
14 years 3 months ago
FPGA Implementations of the RC6 Block Cipher
RC6 is a symmetric-key algorithm which encrypts 128-bit plaintext blocks to 128-bit ciphertext blocks. The encryption process involves four operations: integer addition modulo 2w ,...
Jean-Luc Beuchat
DSONLINE
2008
152views more  DSONLINE 2008»
13 years 10 months ago
Software Architecture Patterns for a Context-Processing Middleware Framework
Ubiquitous applications are characterised by variations of their execution context. Their correct operation requires some continual adaptations based on the observation of their e...
Romain Rouvoy, Denis Conan, Lionel Seinturier
SASP
2009
IEEE
291views Hardware» more  SASP 2009»
14 years 4 months ago
A parameterisable and scalable Smith-Waterman algorithm implementation on CUDA-compatible GPUs
—This paper describes a multi-threaded parallel design and implementation of the Smith-Waterman (SM) algorithm on compute unified device architecture (CUDA)-compatible graphic pr...
Cheng Ling, Khaled Benkrid, Tsuyoshi Hamada
DAC
1999
ACM
14 years 2 months ago
Behavioral Synthesis of Analog Systems Using Two-layered Design Space Exploration
This paper presents a novel approach for synthesis of analog systems from behavioral VHDL-AMS specifications. We implemented this approach in the VASE behavioral-synthesis tool. ...
Alex Doboli, Adrián Núñez-Ald...
ICPP
2006
IEEE
14 years 4 months ago
Designing Multithreaded Algorithms for Breadth-First Search and st-connectivity on the Cray MTA-2
stractions are extensively used to understand and solve challenging computational problems in various scientific and engineering domains. They have particularly gained prominence...
David A. Bader, Kamesh Madduri