218 search results - page 16 / 44 » Architecture Level Power-Performance Tradeoffs for Pipelined... |
ICCD
2003
IEEE
14 years 6 months ago
2003
IEEE
This paper investigates some power efficient data cache designs that try to significantly reduce the cache energy consumption, both static and dynamic, with a minimal impact in pe...
EDBT
2009
ACM
14 years 3 months ago
2009
ACM
Business Intelligence (BI) refers to technologies, tools, and practices for collecting, integrating, analyzing, and presenting large volumes of information to enable better decisi...
ASPLOS
2004
ACM
14 years 2 months ago
2004
ACM
Increased integration in the form of multiple processor cores on a single die, relatively constant die sizes, shrinking power envelopes, and emerging applications create a new cha...
AC
2008
Springer
13 years 9 months ago
2008
Springer
Sparse matrices are first class objects in many VHLLs (very high level languages) used for scientific computing. They are a basic building block for various numerical and combinat...
ICCD
2006
IEEE
14 years 6 months ago
2006
IEEE
—Field-Programmable Gate Array (FPGA) technology is characterized by continuous improvements that provide new opportunities in system design. Multiprocessors-ona-Programmable-Chi...