218 search results - page 17 / 44 » Architecture Level Power-Performance Tradeoffs for Pipelined... |
APCSAC
2001
IEEE
14 years 21 days ago
2001
IEEE
Java bytecodes can be executed with the following three methods: a Java interpretor running on a particular machine interprets bytecodes; a Just-In-Time (JIT) compiler translates ...
CCGRID
2010
IEEE
13 years 10 months ago
2010
IEEE
Idle desktops have been successfully used to run sequential and master-slave task parallel codes on a large scale in the context of volunteer computing. However, execution of messa...
TVLSI
2008
13 years 9 months ago
2008
ion levels. The framework also supports the generation of test constraints, which can be satisfied using a constraint solver to generate tests. A compositional verification approac...
DAC
2001
ACM
14 years 10 months ago
2001
ACM
In this paper, we study the problem of performance-driven multi-level circuit clustering with application to hierarchical FPGA designs. We first show that the performance-driven m...
IEEEPACT
2003
IEEE
14 years 2 months ago
2003
IEEE
Modern architecture research relies heavily on detailed pipeline simulation. Simulating the full execution of an industry standard benchmark can take weeks to months to complete. ...