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» Architecture Level Power-Performance Tradeoffs for Pipelined...
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FPGA
2007
ACM
119views FPGA» more  FPGA 2007»
14 years 3 months ago
Synthesis of an application-specific soft multiprocessor system
The application-specific multiprocessor System-on-a-Chip is a promising design alternative because of its high degree of flexibility, short development time, and potentially high ...
Jason Cong, Guoling Han, Wei Jiang
DAC
2009
ACM
14 years 10 months ago
Handling don't-care conditions in high-level synthesis and application for reducing initialized registers
Don't-care conditions provide additional flexibility in logic synthesis and optimization. However, most work only focuses on the gate level because it is difficult to handle ...
Hong-Zu Chou, Kai-Hui Chang, Sy-Yen Kuo
EDOC
2002
IEEE
14 years 2 months ago
An Architecture and a Process for Implementing Distributed Collaborations
Collaborations (between objects) are increasingly being recognized as fundamental building blocks to structure object-oriented design, and they have made their way into UML. But v...
Eric Cariou, Antoine Beugnard, Jean-Marc Jé...
DATE
2009
IEEE
149views Hardware» more  DATE 2009»
14 years 3 months ago
An ILP formulation for task mapping and scheduling on multi-core architectures
Multi-core architectures are increasingly being adopted in the design of emerging complex embedded systems. Key issues of designing such systems are on-chip interconnects, memory a...
Ying Yi, Wei Han, Xin Zhao, Ahmet T. Erdogan, Tugh...
DATE
2004
IEEE
105views Hardware» more  DATE 2004»
14 years 23 days ago
Time-Energy Design Space Exploration for Multi-Layer Memory Architectures
This paper presents an exploration algorithm which examines execution time and energy consumption of a given application, while considering a parameterized memory architecture. Th...
Radoslaw Szymanek, Francky Catthoor, Krzysztof Kuc...